1. Field of the Invention
This invention relates to semiconductor memory devices and more particularly to small symmetrical SRAM devices.
2. Description of Related Art
U.S. Pat. No. 4,910,576 of Campbell et al for "Memory Cell" shows an SRAM layout without a split polysilicon structure.
U.S. Pat. No. 5,079,611 of Ikeda et al "Semiconductor Integrated Circuit Device and Process for Fabricating the Same" describes an SRAM integrated circuit layout structure, without a split-polysilicon device structure.
In the past integrated circuit SRAM cells have been relatively large in size.
Smaller cells will have the advantage first that the small chip size provides a lower cost and the smaller devices perform at higher speed.
In addition they have had the disadvantage of being asymmetric which is a disadvantage because it is more difficult to provide memory cell stability and provide sense amplifier design.